microcontroller projects with PIC 16F630 - CTCSS to LCD channel interface
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CTCSS : Continuous Tone Coded Subaudio Squelch or Continuous Tone Coded Squelch System
 

Motorola GM600 with a ctcss ID module


The display module


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;======= Ctcss to lcd channel interface ===========================05/11/04==
;     standard crystal 4.0MHz XT
;	pcf2103 lcd driver
;	Bergthaller Iulian (c)2004
;------------------------------------------------------------
;     configure programmer
      LIST P=16F630;f=inhx8m
        #include "P16F630.INC"  ; Include header file
	__CONFIG	_PWRTE_ON  & _WDT_OFF & _XT_OSC & _BODEN & _CP_OFF & _MCLRE_OFF
;------------------------------------------------------------
	cblock 0x20	; Beginn General Purpose-Register
;      cpu init
;-------------------------- counters	
	count1
	count2
	count3
	count4
	count5
;-------------------------- registrii transfer
	transo
	ctcssc
	dig1
	dig2
;--------------------------
	endc
;--------------------------
#DEFINE f_in	PORTA,2
#DEFINE sclk	PORTC,0
#DEFINE sdta	PORTC,1
;--- Reset --------------------------------------------------
	org	h'00'
	goto	init		; reset -> init
;--- Interrupt ----------------------------------------------
	org	h'04'
;************************************************************
init	
	bcf	STATUS,RP0	; Bank 0
	clrf	PORTA
	clrf	PORTC
	movlw	0x05		; Turn comparators off and enable pins for I/O 
	movwf	CMCON	
	bsf	STATUS,RP0	; Bank 1
	movlw	0x0F	; input
	movwf	TRISA
	movlw	0x00	; output
	movwf	TRISC
	bcf	STATUS,RP0	; Bank 0
	movlw	0x00
	movwf	PORTC
	clrf	dig1
	clrf	dig2
	clrf	TMR0
	clrf	INTCON
	bsf	STATUS,RP0	; Bank 1
	movlw	0xA8
	movwf	OPTION_REG
	bcf	STATUS,RP0	; Bank 0
;***************************************************
;* Lcd init commands                               *
;***************************************************
lcd_ini
	call	iict	; i2c start
	movlw	0x74	; device write address (75h for read)
	call	act	; i2c send subroutine
	movlw	0x00	; Co,RS=0, set instruction register for multiple next command bytes  
	call	act
	movlw	0x31	; extended instruction set
	call	act
	movlw	0x02	; set screen configuration left to right 
	call	act
	movlw	0x05	; set display configuration 
	call	act
	movlw	0x08	; set icon mode, full mode, icon blink disable
	call	act
	movlw	0x30	; normal instruction set
	call	act
	movlw	0x0C	; set display on
	call	act
	movlw	0x06	; set cursor move direction
	call	act
	movlw	0x02	; set DDRAM address 0 in address counter
	call	act
	call	iicp	; i2c stop 
;***************************************************
;* Lcd icon sets off                               *
;***************************************************
	call	iict
	movlw	0x74
	call	act
	movlw	0x80	; Co=1, RS=0 just one next command byte
	call	act
	movlw	0x4C	; set CGRAM for icons
	call	act
	movlw	0x40	; Co=0, RS=1, set instruction register for multiple next data bytes  
	call	act
	movlw	0x00	; erase icons sequence
	call	act
	movlw	0x18
	call	act
	movlw	0x00
	call	act
	movlw	0x00
	call	act
	movlw	0x00
	call	act
	movlw	0x00
	call	act
	movlw	0x00
	call	act
	movlw	0x00
	call	act
	movlw	0x00
	call	act
	movlw	0x00
	call	act
	movlw	0x00
	call	act
	movlw	0x00
	call	act
	movlw	0x0F
	call	act
	movlw	0x10
	call	act
	call	iicp	; i2c stop 
;***************************************************
;* Lcd cursor subroutine                           *
;***************************************************		
	call	iict
	movlw	0x74
	call	act
	movlw	0x00
	call	act
	movlw	0x30
	call	act
	movlw	0x01	; clears entire display and sets DDRAM address to 0 in address counter
	call	act
	movlw	0x0C	; display on, cursor off, cursor blink off
	call	act
	call	iicp
;***************************************************
;* Lcd data subroutine                             *
;***************************************************	
nou	call	iict
	movlw	0x74
	call	act
	movlw	0x80	; Co=1, RS=0 just one next command byte
	call	act
	movlw	0x8C	; set CGRAM for characters
	call	act
	movlw	0x40	; Co=0, RS=1, set instruction register for multiple next data bytes  
	call	act
	movlw	0x20	; _ 
	call	act
	movlw	0xC9	; I
	call	act
	movlw	0xE4	; d
	call	act
	movlw	0xBA	; :
	call	act
	movlw	0x20	; _ 
	call	act
	movf	dig2,W
	addlw	0xB0
	call	act
	movf	dig1,W
	addlw	0xB0
	call	act
	call	iicp
;***************************************************
	clrf	ctcssc
	clrf	TMR0
	call	pause
	movf	TMR0,W
	movwf	ctcssc
	btfsc	STATUS,Z
	goto	plici
	movlw	0x02
	movwf	PCLATH
	movf	ctcssc,W
	call	decode
	movwf	ctcssc
plici	call	mux
stai	goto	nou
;***************************************************
act	movwf	transo	; iic data transmission 
	movlw	0x08
	movwf	count3
vbit	bcf	sclk
	call	haltb
	btfsc	transo,7	
	bsf	sdta
	btfss	transo,7
	bcf	sdta
	call	haltb
	bsf	sclk
	call	haltb
	bcf	sclk
	call	haltb
	rlf	transo,F
	decfsz	count3,F
	goto	vbit
	call	ackp
	retlw	0x00
;***************************************************
iicp	bcf	sdta	; stop condition module
	call	haltb
	bsf	sclk
	call	haltb
	bsf	sdta	; stop command
	call	haltb
	bcf	sclk
	call	haltb
	retlw	0x00
;***************************************************	
iict	bsf	sdta	; start condition module 
	bsf	sclk
	call	haltb
	bcf	sdta	; start command
	call	haltb
	bcf	sclk
	call	haltb
	retlw	0x00
;***************************************************
ackp	call	ser_in
	bsf	sclk	; one clock step for acknowledge (not read)
	call	haltb
	bcf	sclk
	call	ser_out
	retlw	0x00
;***************************************************
mux	clrf	dig1
	clrf	dig2
	movf	ctcssc,F ; zero bit test if dig=dig=0
	btfss	STATUS,Z
	goto	calc
	goto	gatam
calc	call	digi
	decfsz	ctcssc,F
	goto	calc
gatam	return
;***************************************************
digi	incf	dig1,F
	movlw	0x0A
	subwf	dig1,W
	btfss	STATUS,Z ;test zero bit
	goto	gatas
	clrf	dig1
	incf	dig2,F
	movlw	0x0A
	subwf	dig2,W
	btfss	STATUS,Z ;test zero bit
	goto	gatas
	clrf	dig2
gatas	retlw	0x00	
;************************************************************************
;	Subrutine de intarziere				 				*
;************************************************************************
;________________________________________________________________________
haltb	nop	; 10 us delay
	nop
	nop
	nop
	nop
	nop	
 	return
;________________________________________________________________________
pause	movlw	0x04 ;	cca. 1s
hopa	movwf	count3
d3	movlw	0xF9
	movwf	count1
d1	movlw	0xFA	  
	movwf	count2
d2	nop
	decfsz	count2,F	
	goto	d2		
	decfsz	count1,F	
	goto	d1		
	decfsz	count3,F    
	goto	d3          
	retlw	0x00
;************************************************************************
ser_in
	bsf	STATUS,RP0	; Bank 1
	movlw	0x02	; input
	movwf	TRISC
	bcf	STATUS,RP0	; Bank 0
	return
;************************************************************************
ser_out
	bsf	STATUS,RP0	; Bank 1
	movlw	0x00	; output
	movwf	TRISC
	bcf	STATUS,RP0	; Bank 0
	return
;************************************************************************
;*	adrese  grafica									*
;************************************************************************
	ORG	0x0200
decode	
	addwf	PCL,F
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00	;10
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00	;20
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00	;30
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00	;40
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00	;50
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00	;60
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00
	retlw 0x00	;65
	retlw 0x01
	retlw 0x01	;67
	retlw 0x02
	retlw 0x02	;69
	retlw 0x03
	retlw 0x03	;71
	retlw 0x03
	retlw 0x04
	retlw 0x04	;74
	retlw 0x04
	retlw 0x05
	retlw 0x05	;77
	retlw 0x06
	retlw 0x06	;79
	retlw 0x06
	retlw 0x07
	retlw 0x07	;82
	retlw 0x07
	retlw 0x08
	retlw 0x08	;85
	retlw 0x08
	retlw 0x09
	retlw 0x09	;88
	retlw 0x09
	retlw 0x0A
	retlw 0x0A	;91
	retlw 0x0A
	retlw 0x0B
	retlw 0x0B	;94
	retlw 0x0B
	retlw 0x0C
	retlw 0x0C	;97
	retlw 0x0C
	retlw 0x0D
	retlw 0x0D	;100
	retlw 0x0D
	retlw 0x0E
	retlw 0x0E	;103
	retlw 0x0E
	retlw 0x0E
	retlw 0x0F
	retlw 0x0F	;107
	retlw 0x0F
	retlw 0x10
	retlw 0x10	;110
	retlw 0x10
	retlw 0x11
	retlw 0x11
	retlw 0x11	;114
	retlw 0x11
	retlw 0x12
	retlw 0x12
	retlw 0x12	;118
	retlw 0x12
	retlw 0x13
	retlw 0x13
	retlw 0x13
	retlw 0x13	;123
	retlw 0x13
	retlw 0x14
	retlw 0x14
	retlw 0x14	;127
	retlw 0x14
	retlw 0x15
	retlw 0x15
	retlw 0x15	;131
	retlw 0x15
	retlw 0x16
	retlw 0x16
	retlw 0x16
	retlw 0x16	;136
	retlw 0x16
	retlw 0x17
	retlw 0x17
	retlw 0x17
	retlw 0x17	;141
	retlw 0x17
	retlw 0x18
	retlw 0x18
	retlw 0x18
	retlw 0x18	;146
	retlw 0x18
	retlw 0x19
	retlw 0x19
	retlw 0x19
	retlw 0x19	;151
	retlw 0x19
	retlw 0x1A
	retlw 0x1A
	retlw 0x1A
	retlw 0x1A	;156
	retlw 0x1A
	retlw 0x1B
	retlw 0x1B	;159
	retlw 0x1B
	retlw 0x1C
	retlw 0x1C	;162
	retlw 0x1C
	retlw 0x1D
	retlw 0x1D	;165
	retlw 0x1E
	retlw 0x1E	;167
	retlw 0x1E
	retlw 0x1F
	retlw 0x1F
	retlw 0x1F	;171
	retlw 0x20
	retlw 0x20	;173
	retlw 0x20
	retlw 0x21
	retlw 0x21
	retlw 0x21	;177
	retlw 0x22
	retlw 0x22	;179
	retlw 0x22
	retlw 0x23
	retlw 0x23
	retlw 0x23	;183
	retlw 0x23
	retlw 0x24
	retlw 0x24	;186
	retlw 0x24
	retlw 0x25
	retlw 0x25	;189
	retlw 0x25
	retlw 0x26
	retlw 0x26	;192
	retlw 0x26
	retlw 0x27
	retlw 0x27
	retlw 0x27	;196
	retlw 0x27
	retlw 0x28
	retlw 0x28	;199
	retlw 0x28
	retlw 0x29
	retlw 0x29
	retlw 0x29	;203
	retlw 0x29
	retlw 0x2A
	retlw 0x2A	;206
	retlw 0x2A
	retlw 0x2B
	retlw 0x2B
	retlw 0x2B	;210
	retlw 0x2B
	retlw 0x2C
	retlw 0x2C
	retlw 0x2C
	retlw 0x2C
	retlw 0x2C
	retlw 0x2C
	retlw 0x2C	;218
	retlw 0x2C
	retlw 0x2D
	retlw 0x2D
	retlw 0x2D
	retlw 0x2D
	retlw 0x2D
	retlw 0x2D	;225
	retlw 0x2D
	retlw 0x2E
	retlw 0x2E
	retlw 0x2E	;229
	retlw 0x2E
	retlw 0x2F
	retlw 0x2F
	retlw 0x2F	;233
	retlw 0x2F
	retlw 0x30
	retlw 0x30
	retlw 0x30
	retlw 0x30
	retlw 0x30
	retlw 0x30
	retlw 0x30	;241
	retlw 0x30
	retlw 0x31
	retlw 0x31
	retlw 0x31
	retlw 0x31
	retlw 0x31
	retlw 0x31
	retlw 0x31
	retlw 0x31	;250
	retlw 0x31
	retlw 0x32
	retlw 0x32
	retlw 0x32	;254
;============================================================
	end
;============================================================
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Last updated January, 2005

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